The programmable logic (FPGA and CPLD) market is still one of the fastest growing markets in the semiconductor industry. One of the emerging applications of FPGAs in Europe is in harsh environment markets. This market puts severe requirements on FPGAs such as reliability, security, dynamic configurability and more importantly European Independence.

The European industry must have access to an independent source for harsh-environment FPGA, not only to suit the needs of European industry but also to position Europe in this market segment. In order to survive in today’s extremely competitive world, Europe must be able to provide high complexity radiation-hardened reprogrammable FPGAs and Systems-On-Chip providing state-of-the-art tamper proof security features. In addition, these components must be free of export control.

In addition, embedded avionic applications are more and more demanding in terms of computing capabilities. This continuous increase of performances can be naturally addressed with a move from the traditional single core architectures to the multi-core ones. However, these architecture lead to an intrinsic indeterminism in the software execution that is not compatible with avionic certification constraints.

DEMETER is a European project aiming at answering the needs of the European industry providing:

  1. A platform to prepare the development of a large radiation hardened FPGAs which is not available on the market today.
  2. A second platform to bring the means to European avionic actors to evaluate the multi core concept regarding aeronautic certification. In addition, the demonstrator will include an embedded FPGA that will bring a high level of flexibility to implement dedicated logic like interfaces or hardware acceleration engines tightly coupled with the cores.
Both platform will be developed in 28nm FDSOI technology which combines a high level of integration with an outstanding intrinsic radiation robustness.


The work has been performed in the project DEMETER, co-funded by grants from Poland, France, Greece, Italy and the ENIAC Joint Undertaking.